When the voltage across a certain resistor increases, the current flow in that resistor will also increase (and visa versa). This is not true for a capacitor. We already saw in the introduction that if a capacitor is fully charged (so the voltage across it has reached its maximum), the current flow stops. The current will have its maximum value when the capacitor is empty. Let's look what happens if we connect a capacitor to a sinusoidal voltage source.

We connected a capacitor to a 1kHz voltage source. The green curve
shows the voltage across the capacitor and the blue curve shows the
current flow. We see that the current reaches the top value 1/4 period
before the voltage. Since 1/4 period of a sine wave equals 90 degrees, we
say that the current *leads* the voltage by 90 degrees,
because the current reaches its top value *before* the
voltage does. We can also say that the voltage *lags*
the current by 90 degrees.